EDN

Solving FPGA I/O pin assignment challenges

Editor's Note: I've long been impressed by Xcell Journal from Xilinx, both for the quality of its production and the quality of its articles. A few weeks ago we looked at an article on Replacing ...
Electronics Weekly

FPGA benefits from optical I/O packaging

Ayar Labs has integrated an Intel Agilex FPGA into an optical I/O chiplet package delivering, it claims, 5x the bandwidth at 5x lower power and 20x lower latency than current market products. “We’re ...
Electronic Design

FPGA Q&A: Lattice Semiconductor

Electronic Design held a series of Q&A sessions with several major FPGA companies. Here, our roundtable discussion with Lattice Semiconductor included Bertrand Leigh, director of applications ...
EDN

Power-aware FPGA design (Part 1)

Power consumption requirements in new autonomous, multimedia-savvy consumer products that can store, transmit, and receive data have catapulted system architects and board and chip designers into a ...
Electronic Design

FPGA Based I/O Card Is Up For Anything

Introduced as a standalone, no-bus version of the FPGA-based Anything I/O card series, the 7I60 I/O card provides 96 I/O bits and four serial ports: two RS-232 and two RS-485. One RS-232 port is used ...
Design-Reuse

Lattice Announces MachXO3 FPGA Family; Most Advanced, Lowest Cost per I/O Programmable Bridging and I/O Expansion Solution

MachXO3 FPGA Family Brings 640 to 22K Logic Cells, Lowest Power, 1 Cent per I/O, and Hard IP Blocks to Ease Implementation of Emerging Connectivity Interfaces HILLSBORO, OR -- September 24, 2013 -- ...
Linux Journal

Xilinx FPGA Design Tools for Linux

A field programmable gate array (FPGA) is a user-programmable piece of silicon constructed in very large-scale integration (VLSI) technology. The VLSI transistor-level detail is absolutely predefined ...
insideHPC

New TeraBox 1U FPGA Server Doubles Compute and I/O Density

Today BittWare announced the TeraBox 1432D high density 1U FPGA server at SC17. Based on a Dell PowerEdge C4130, the customized TeraBox 1432D provides an unprecedented thirty-two 100GbE ports directly ...
Semiconductor Engineering

Software Driven Test Of FPGA Prototype

Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real ...
Embedded

Basics of core-based FPGA design: Part 2 – System design considerations

There are a number of system design factors requiring consideration when implementing an FPGA processor. Some of those factors include the use of co-design, processor architectural implementation, ...
Design-Reuse

Solving FPGA I/O pin assignment challenges

A few weeks ago we looked at an article on Replacing obsolete video game circuits with Xilinx CPLDs, and now I'm delighted to have the opportunity to present the following piece from the Third Quarter ...